Digital Electronics | Semester Question Paper - Nov 2012

                SASTRA UNIVERSITY

Year : Nov 2012                                                    Semester : Third Semester
Subject : Digital Electronics                                          Time : 3 Hrs.

                          Part-A

Answer all the questions [20*2=40 Marks]

1. State DeMorgans theorems.
2. Using the distributive property,prove that A+BC=(A+B)(A+C)
3. What are dont care combinations?
4. Realize AND function using only the NOR gates.
5. Give the basic circuit of a DTL NAND gate.
6. Draw the logic diagram of an equality comparator.
7. What is a binary decoder?
8. Explain EEPROM.
9. What is Flash Memory?
10.Explain GAL.
11.State the necessary rules in drawing the ASM charts.
12.Draw the state diagram for sequence detector.
13.Give the state diagram for the Mealy sequential network.
14.Draw the Mealy model of a clocked synchronous sequential network.
15.What are ASM charts? Give their basic components.
16.Draw the symbols of state and decision boxes.
17.Give the diagram of a 4-bit synchronous binary counter.
18.Illustrate the SIPO unidirectional shift register.
19.Draw the logic diagram of SR latch.
20.Give the general structure of PLDs.

             

                 Part-B

Answer all the questions [4*15=60 Marks]

21.Reduce using mapping the expression m(0,1,2,3,5,7,8,9,10,12,13)and implement the same in universal logic.
(OR)
22.(a) Explain CMOS logic gates. [3]
(b) With necessary diagrams diagrams describe the working of CMOS inverter and CMOS NAND gates[12]

23. (a) What is a priority encoder? [2]
(b) Giving the truth table of a 4-bit priority encoder use K-map simplification and draw the logic diagram. [13]
(OR)
24. (a) Give the classification of memories. [3]
(b) Explain the architecture of FPGA. [6]
(c) Draw the circuit of a module with 3 interconnected 2 to 1 multiplexers and an OR gate.

25. (a) What are ASM charts? [3]
(b) Construct an ASM chart for a synchronous sequential network to recognize the input sequence of pairs x1x2=01,01,11,00. [12]
(OR)
26. Give the design of a 3-bitup/down synchronous counter and describe its function in detail.

27. Realize Trigger Flip-flop using S-R Flip-flop.
(OR)
28. (a) What is a register? [2]
(b) Bring out the difference between a register and a counter. [3]
(c) Draw the logic diagram of the 74194 4-bit universal sift register and explain its function.[10]

Tags : Sastra University Digital Electronics question Papers , Sastra University Digital Electronics previous year question Papers , Sastra University Digital Electronics old question Papers , Sastra University Digital Electronics  question Papers , Sastra University Digital Electronics  previous year question Papers , Sastra University Digital Electronics  old question Papers , Sastra  Digital Electronics question Papers , Sastra  Digital Electronics previous year question Papers , Sastra  Digital Electronics old question Papers , Sastra  Digital Electronics  question Papers , Sastra  Digital Electronics  previous year question Papers , Sastra  Digital Electronics  old question Papers , Anna University Digital Electronics question Papers , Anna University Digital Electronics previous year question Papers , Anna University Digital Electronics old question Papers , Anna University Digital Electronics  question Papers , Anna University Digital Electronics  previous year question Papers , Anna University Digital Electronics  old question Papers